101 lines
3.5 KiB
C
101 lines
3.5 KiB
C
/**
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******************************************************************************
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* @file : main.c
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* @author : Auto-generated by STM32CubeIDE
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* @brief : Main program body
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2026 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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#include <stdint.h>
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#include <config.h>
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#if !defined(__SOFT_FP__) && defined(__ARM_FP)
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#warning "FPU is not initialized, but the project is compiling for an FPU. Please initialize the FPU before use."
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#endif
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void SystemClock_Config_180MHz(void);
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int main(void)
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{
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SystemClock_Config_180MHz();
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motor_init();
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init_Timer_RoueGauche(AVANCE, 0);
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InitGPIOUS();
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InitTimerUS();
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//init_Timer_RoueDroit(AVANCE, 0);
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/* Loop forever */
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while(1)
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{
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//set_RoueGauche_Sens(AVANCE, 50);
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if (finReception == 1) {
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uint32_t distance = ComputeDistance(nbr_un_final);
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if (distance <= 5) { // ignore le plancher de bruit
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set_RoueGauche_Sens(RECUL, 100);
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} else {
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set_RoueGauche_Sens(AVANCE, 0);
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}
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finReception = 0;
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}
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}
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}
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void SystemClock_Config_180MHz(void) { // Fonction faite par Keil (pas besoin de l'écrire)
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// 1. Activer l'horloge du périphérique Power (PWR)
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RCC->APB1ENR |= RCC_APB1ENR_PWREN;
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// 2. Configurer le régulateur de tension en mode "Scale 1" (obligatoire pour hautes fréq.)
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PWR->CR |= PWR_CR_VOS;
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// 3. Activer le mode Over-Drive (Indispensable sur le F446 pour dépasser 168 MHz)
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PWR->CR |= PWR_CR_ODEN;
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while (!(PWR->CSR & PWR_CSR_ODRDY)); // Attendre que l'Over-Drive soit prêt
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PWR->CR |= PWR_CR_ODSWEN;
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while (!(PWR->CSR & PWR_CSR_ODSWRDY)); // Attendre le basculement effectif
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// 4. Configurer la mémoire Flash (5 Wait States requis pour 180 MHz à 3.3V)
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FLASH->ACR = FLASH_ACR_PRFTEN | FLASH_ACR_ICEN | FLASH_ACR_DCEN | (5 << FLASH_ACR_LATENCY_Pos);
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// 5. Configurer les diviseurs des bus (Prescalers)
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// HCLK = 180 MHz (DIV1), PCLK1 = 45 MHz (DIV4 max), PCLK2 = 90 MHz (DIV2 max)
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RCC->CFGR &= ~(RCC_CFGR_HPRE | RCC_CFGR_PPRE1 | RCC_CFGR_PPRE2);
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RCC->CFGR |= (RCC_CFGR_PPRE1_DIV4 | RCC_CFGR_PPRE2_DIV2);
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// 6. Configurer la PLL (Basée sur l'horloge interne HSI à 16 MHz)
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// Formule : VCO_in = HSI / M = 16 / 8 = 2 MHz
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// VCO_out = VCO_in * N = 2 * 180 = 360 MHz
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// SYSCLK = VCO_out / P = 360 / 2 = 180 MHz
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RCC->PLLCFGR &= ~(RCC_PLLCFGR_PLLM | RCC_PLLCFGR_PLLN | RCC_PLLCFGR_PLLP | RCC_PLLCFGR_PLLSRC);
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RCC->PLLCFGR |= (8 << RCC_PLLCFGR_PLLM_Pos) |
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(180 << RCC_PLLCFGR_PLLN_Pos) |
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(0 << RCC_PLLCFGR_PLLP_Pos) | // 0 équivaut à un diviseur P = 2
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RCC_PLLCFGR_PLLSRC_HSI;
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// 7. Activer la PLL
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RCC->CR |= RCC_CR_PLLON;
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while (!(RCC->CR & RCC_CR_PLLRDY)); // Attendre le verrouillage de la PLL
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// 8. Basculer l'horloge système (SYSCLK) sur la PLL
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RCC->CFGR &= ~RCC_CFGR_SW;
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RCC->CFGR |= RCC_CFGR_SW_PLL;
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while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_PLL);
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// 9. ✨ L'ASTUCE STM32F446 ✨ : Booster les horloges des Timers
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RCC->DCKCFGR |= RCC_DCKCFGR_TIMPRE;
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}
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