260 lines
8.0 KiB
C
260 lines
8.0 KiB
C
/*
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* config.c
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*
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* Created on: 28 mai 2026
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* Author: innotex
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*/
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#include <config.h>
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#include <stdint.h>
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uint32_t index_time = 0;
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uint32_t nbr_un = 0;
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uint32_t nbr_un_final = 0;
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volatile uint8_t finReception = 0;
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volatile uint32_t it_count = 0;
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void motor_init(void)
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{
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// Init des clks sur portB et A
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RCC->AHB1ENR |= (RCC_AHB1ENR_GPIOAEN | RCC_AHB1ENR_GPIOBEN);
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GPIOA->MODER &= ~INIT_MODDER_MOTOR_PBA_MSK;
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GPIOA->MODER |= INIT_MODDER_MOTOR_PBA;
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GPIOB->MODER &= ~INIT_MODDER_MOTOR_PBB_MSK;
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GPIOB->MODER |= INIT_MODDER_MOTOR_PBB;
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GPIOA->OSPEEDR &= ~INIT_OSPEEDR_MOTOR_PBA_MSK;
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GPIOA->OSPEEDR |= INIT_OSPEEDR_MOTOR_PBA;
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GPIOB->OSPEEDR &= ~INIT_OSPEEDR_MOTOR_PBB_MSK;
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GPIOB->OSPEEDR |= INIT_OSPEEDR_MOTOR_PBB;
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GPIOA->PUPDR &= ~INIT_PUPDR_MOTOR_PBA_MSK;
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GPIOA->PUPDR &= ~INIT_PUPDR_MOTOR_PBB_MSK;
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GPIOA->ODR &= ~(GPIO_ODR_ODR_10);
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GPIOB->ODR &= ~(GPIO_ODR_ODR_10 | GPIO_ODR_ODR_5 | GPIO_ODR_ODR_4);
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}
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void init_Timer_RoueDroit(char sens, uint8_t vitesse)
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{
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RCC->APB1ENR |= (RCC_APB1ENR_TIM2EN | RCC_APB1ENR_TIM3EN);
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GPIOB->MODER &= ~(GPIO_MODER_MODER5 | GPIO_MODER_MODER10);
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GPIOB->MODER |= (GPIO_MODER_MODER5_1 | GPIO_MODER_MODER10_1); // PB5 et PB10 configuré en alterned function
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// Configuration du TIM3 CH2 sur PB5 sur AF02.
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GPIOB->AFR[0] &= ~GPIO_AFRL_AFSEL5; // Nettoyage des 4 bits
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GPIOB->AFR[0] |= (2 << GPIO_AFRL_AFSEL5_Pos); // Application de AF2
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// PB10 -> AF01 (TIM2). En binaire AF01 s'écrit "0001". On active donc le bit 0.
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GPIOB->AFR[1] &= ~GPIO_AFRH_AFSEL10; // Nettoyage des 4 bits
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GPIOB->AFR[1] |= (1 << GPIO_AFRH_AFSEL10_Pos); // Application de AF1
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TIM2->PSC = 35; //PSC = f_horloge/f_tick - 1
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TIM2->ARR = 99; // résolution - 1
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TIM3->PSC = 35; //PSC = f_horloge/f_tick - 1
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TIM3->ARR = 99; // résolution - 1
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TIM2->CR1 &= ~TIM_CR1_CMS; // Edge-aligned mode compteur compte de à -> 99 puis retourne à 0
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TIM2->CR1 &= ~TIM_CR1_DIR; // Counter used as upcounter
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TIM3->CR1 &= ~TIM_CR1_CMS; // Edge-aligned mode compteur compte de à -> 99 puis retourne à 0
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TIM3->CR1 &= ~TIM_CR1_DIR; // Counter used as upcounter
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TIM2->CR1 |= TIM_CR1_ARPE;
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TIM3->CR1 |= TIM_CR1_ARPE;
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TIM2->CCMR2 &= ~TIM_CCMR2_CC3S;
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TIM3->CCMR1 &= ~TIM_CCMR1_CC1S;
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TIM2->CCMR2 &= ~TIM_CCMR2_OC3M;
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TIM2->CCMR2 |= (6 << TIM_CCMR2_OC3M_Pos);
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TIM3->CCMR1 &= ~TIM_CCMR1_OC2M;
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TIM3->CCMR1 |= (6 << TIM_CCMR1_OC2M_Pos);
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// Activation du Preload pour le Canal 2 du Timer 3
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TIM3->CCMR1 |= TIM_CCMR1_OC2PE;
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// Activation du Preload pour le Canal 3 du Timer 2
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TIM2->CCMR2 |= TIM_CCMR2_OC3PE;
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TIM2->CCER |= TIM_CCER_CC3E; // Activer la sortie du Canal 3
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TIM2->CCR3 = vitesse; // Vitesse initiale à 0
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TIM2->CR1 |= TIM_CR1_CEN; // Démarrer le Timer 2
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TIM3->CCER |= TIM_CCER_CC2E; // Activer la sortie du Canal 2 (Capture/Compare 2 Enable)
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TIM3->CCR2 = 0; // Vitesse initiale à 0
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TIM3->CR1 |= TIM_CR1_CEN; // Démarrer le Timer 3 (Counter ENable)
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}
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void init_Timer_RoueGauche(char sens, uint8_t vitesse)
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{
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// Activation des horloges
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RCC->AHB1ENR |= (RCC_AHB1ENR_GPIOAEN | RCC_AHB1ENR_GPIOBEN);
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RCC->APB1ENR |= RCC_APB1ENR_TIM3EN;
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RCC->APB2ENR |= RCC_APB2ENR_TIM1EN;
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// Configuration des MODER
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GPIOB->MODER &= ~GPIO_MODER_MODER4;
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GPIOB->MODER |= GPIO_MODER_MODER4_1; // PB4 en AF
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GPIOA->MODER &= ~GPIO_MODER_MODER10;
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GPIOA->MODER |= GPIO_MODER_MODER10_1; // PA10 en AF
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// Configuration des AFR
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// PB4 -> TIM3 CH1 (AF02)
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GPIOB->AFR[0] &= ~GPIO_AFRL_AFSEL4;
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GPIOB->AFR[0] |= (2 << GPIO_AFRL_AFSEL4_Pos);
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// PA10 -> TIM1 CH3 (AF01)
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GPIOA->AFR[1] &= ~GPIO_AFRH_AFSEL10;
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GPIOA->AFR[1] |= (1 << GPIO_AFRH_AFSEL10_Pos);
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// Paramétrage Timers
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TIM3->PSC = 35; TIM3->ARR = 99; TIM3->CR1 |= TIM_CR1_ARPE;
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TIM1->PSC = 35; TIM1->ARR = 99; TIM1->CR1 |= TIM_CR1_ARPE;
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// --- TIM3 CH1 (PB4) ---
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TIM3->CCMR1 &= ~TIM_CCMR1_OC1M;
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TIM3->CCMR1 |= (6 << TIM_CCMR1_OC1M_Pos) | TIM_CCMR1_OC1PE;
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TIM3->CCER |= TIM_CCER_CC1E; // Activer le Canal 1
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// --- TIM1 CH3 (PA10) ---
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TIM1->CCMR2 &= ~TIM_CCMR2_OC3M;
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TIM1->CCMR2 |= (6 << TIM_CCMR2_OC3M_Pos) | TIM_CCMR2_OC3PE;
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TIM1->CCER |= TIM_CCER_CC3E; // Activer le Canal 3
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TIM1->BDTR |= TIM_BDTR_MOE; // OBLIGATOIRE POUR TIM1
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// Initialisation vitesses
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TIM3->CCR1 = 0; // Utilise CCR1 pour canal 1
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TIM1->CCR3 = vitesse; // Utilise CCR3 pour canal 3
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// Démarrage
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TIM3->CR1 |= TIM_CR1_CEN;
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TIM1->CR1 |= TIM_CR1_CEN;
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}
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/*
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* INIT US :
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* PA1 : TIM2_CH2 : AF01
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* PA5 : TIM2_CH1 / ETR : AF01
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* PA8 : TIM1_CH1 : AF01
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* PA12 : TIM1_ETR AF01
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*/
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void InitGPIOUS(void) {
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// 1. Activer l'horloge GPIOA
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN;
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// 2. Configuration des MODER
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// Nettoyage complet des bits pour PA1, PA5, PA8, PA12
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GPIOA->MODER &= ~(GPIO_MODER_MODER1 | GPIO_MODER_MODER5 | GPIO_MODER_MODER8 | GPIO_MODER_MODER12);
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// PA1 en AF (0b10), PA5 en Output (0b01), PA12 en Output (0b01), PA8 en Input (0b00)
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GPIOA->MODER |= (2 << GPIO_MODER_MODER1_Pos) | (1 << GPIO_MODER_MODER5_Pos) | (1 << GPIO_MODER_MODER12_Pos);
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GPIOA->OSPEEDR &= ~(GPIO_OSPEEDR_OSPEED1_Msk |GPIO_OSPEEDR_OSPEED5_Msk | GPIO_OSPEEDR_OSPEED12_Msk);
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GPIOA->OSPEEDR |= (2 << GPIO_OSPEEDR_OSPEED1_Pos | 2 << GPIO_OSPEEDR_OSPEED5_Pos | 2 << GPIO_OSPEEDR_OSPEED12_Pos);
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GPIOA->PUPDR &= ~(GPIO_PUPDR_PUPD8_Msk);
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GPIOA->PUPDR |= (2 << GPIO_PUPDR_PUPD8_Pos);
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// 3. Configuration AF pour PA1 (TIM2_CH2 est AF01)
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GPIOA->AFR[0] &= ~GPIO_AFRL_AFSEL1;
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GPIOA->AFR[0] |= (1 << GPIO_AFRL_AFSEL1_Pos);
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}
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void InitTimerUS(void) {
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// 1. Horloge TIM2
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RCC->APB1ENR |= RCC_APB1ENR_TIM2EN;
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// 2. Base de temps : Te = 100 µs @ 180 MHz
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TIM2->PSC = 179; // 180 MHz / 180 = 1 MHz
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TIM2->ARR = 99; // 1 MHz / 100 = 10 kHz
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TIM2->CR1 |= TIM_CR1_ARPE; // preload ARR
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// 3. Canal 2 (PA1) en PWM mode 1 -> validation étape 1
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TIM2->CCMR1 &= ~TIM_CCMR1_CC2S; // CC2 en sortie
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TIM2->CCMR1 &= ~TIM_CCMR1_OC2M;
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TIM2->CCMR1 |= (6 << TIM_CCMR1_OC2M_Pos); // PWM mode 1
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TIM2->CCMR1 |= TIM_CCMR1_OC2PE; // preload CCR2
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TIM2->CCER |= TIM_CCER_CC2E; // activer sortie OC2
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TIM2->CCR2 = 50; // 50 % de 100
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// 4. Interruption de débordement
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TIM2->DIER |= TIM_DIER_UIE;
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NVIC_EnableIRQ(TIM2_IRQn);
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// 6. Démarrage
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TIM2->CR1 |= TIM_CR1_CEN;
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}
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void UltraSoundMgt(void) {
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if (index_time < 500) { // 100*10⁽-6) * 500 = 0.05 soit 50ms (période de l'US)
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if (index_time == 0) {
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GPIOA->ODR |= GPIO_ODR_ODR_12; // Trig = 1
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nbr_un = 0;
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} else if (index_time == 1) {
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GPIOA->ODR &= ~GPIO_ODR_ODR_12; // Trig = 0
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} else {
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if (GPIOA->IDR & GPIO_IDR_IDR_8) // lecture Echo
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nbr_un++;
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}
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index_time++;
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} else {
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nbr_un_final = nbr_un;
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finReception = 1;
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index_time = 0;
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}
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}
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void TIM2_IRQHandler(void) {
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// On vérifie si c'est bien l'interruption de mise à jour (Update) du Timer 2
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if (TIM2->SR & TIM_SR_UIF) {
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// 1. Reset au niveau du périphérique (Timer 2)
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TIM2->SR &= ~TIM_SR_UIF;
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// 2. Reset au niveau du processeur (NVIC)
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NVIC_ClearPendingIRQ(TIM2_IRQn);
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// Exécution de ta machine d'état
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UltraSoundMgt();
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}
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}
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/**
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* Pilote le sens et la vitesse du moteur gauche
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* @param sens : 'A' pour AVANT (PB4 actif), 'R' pour RECULER (PA10 actif)
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* @param vitesse : valeur de 0 à 99
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*/
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void set_RoueGauche_Sens(int sens, uint8_t vitesse)
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{
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if (sens == AVANCE) // Marche avant
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{
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TIM3->CCR1 = vitesse; // PWM sur PB4
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TIM1->CCR3 = 0; // PA10 à 0
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}
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else if (sens == RECUL) // Marche arrière
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{
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TIM3->CCR1 = 0; // PB4 à 0
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TIM1->CCR3 = vitesse; // PWM sur PA10
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}
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else // Arrêt
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{
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TIM3->CCR1 = 0;
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TIM1->CCR3 = 0;
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}
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}
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uint32_t ComputeDistance(uint32_t nbrUnFinal) {
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return (nbrUnFinal * 100u) / 59u; // ≈ /58.8235
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}
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