135 lines
4.3 KiB
C
135 lines
4.3 KiB
C
/*
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* config.c
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*
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* Created on: 28 mai 2026
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* Author: innotex
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*/
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#include <config.h>
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#include <stdint.h>
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void motor_init(void)
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{
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// Init des clks sur portB et A
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RCC->AHB1ENR |= (RCC_AHB1ENR_GPIOAEN | RCC_AHB1ENR_GPIOBEN);
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GPIOA->MODER &= ~INIT_MODDER_MOTOR_PBA_MSK;
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GPIOA->MODER |= INIT_MODDER_MOTOR_PBA;
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GPIOB->MODER &= ~INIT_MODDER_MOTOR_PBB_MSK;
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GPIOB->MODER |= INIT_MODDER_MOTOR_PBB;
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GPIOA->OSPEEDR &= ~INIT_OSPEEDR_MOTOR_PBA_MSK;
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GPIOA->OSPEEDR |= INIT_OSPEEDR_MOTOR_PBA;
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GPIOB->OSPEEDR &= ~INIT_OSPEEDR_MOTOR_PBB_MSK;
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GPIOB->OSPEEDR |= INIT_OSPEEDR_MOTOR_PBB;
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GPIOA->PUPDR &= ~INIT_PUPDR_MOTOR_PBA_MSK;
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GPIOA->PUPDR &= ~INIT_PUPDR_MOTOR_PBB_MSK;
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GPIOA->ODR &= ~(GPIO_ODR_ODR_10);
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GPIOB->ODR &= ~(GPIO_ODR_ODR_10 | GPIO_ODR_ODR_5 | GPIO_ODR_ODR_4);
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}
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void init_Timer_RoueDroit(char sens, uint8_t vitesse)
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{
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RCC->APB1ENR |= (RCC_APB1ENR_TIM2EN | RCC_APB1ENR_TIM3EN);
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GPIOB->MODER &= ~(GPIO_MODER_MODER5 | GPIO_MODER_MODER10);
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GPIOB->MODER |= (GPIO_MODER_MODER5_1 | GPIO_MODER_MODER10_1); // PB5 et PB10 configuré en alterned function
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// Configuration du TIM3 CH2 sur PB5 sur AF02.
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GPIOB->AFR[0] &= ~GPIO_AFRL_AFSEL5; // Nettoyage des 4 bits
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GPIOB->AFR[0] |= (2 << GPIO_AFRL_AFSEL5_Pos); // Application de AF2
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// PB10 -> AF01 (TIM2). En binaire AF01 s'écrit "0001". On active donc le bit 0.
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GPIOB->AFR[1] &= ~GPIO_AFRH_AFSEL10; // Nettoyage des 4 bits
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GPIOB->AFR[1] |= (1 << GPIO_AFRH_AFSEL10_Pos); // Application de AF1
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TIM2->PSC = 35; //PSC = f_horloge/f_tick - 1
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TIM2->ARR = 99; // résolution - 1
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TIM3->PSC = 35; //PSC = f_horloge/f_tick - 1
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TIM3->ARR = 99; // résolution - 1
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TIM2->CR1 &= ~TIM_CR1_CMS; // Edge-aligned mode compteur compte de à -> 99 puis retourne à 0
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TIM2->CR1 &= ~TIM_CR1_DIR; // Counter used as upcounter
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TIM3->CR1 &= ~TIM_CR1_CMS; // Edge-aligned mode compteur compte de à -> 99 puis retourne à 0
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TIM3->CR1 &= ~TIM_CR1_DIR; // Counter used as upcounter
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TIM2->CR1 |= TIM_CR1_ARPE;
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TIM3->CR1 |= TIM_CR1_ARPE;
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TIM2->CCMR2 &= ~TIM_CCMR2_CC3S;
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TIM3->CCMR1 &= ~TIM_CCMR1_CC1S;
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TIM2->CCMR2 &= ~TIM_CCMR2_OC3M;
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TIM2->CCMR2 |= (6 << TIM_CCMR2_OC3M_Pos);
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TIM3->CCMR1 &= ~TIM_CCMR1_OC2M;
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TIM3->CCMR1 |= (6 << TIM_CCMR1_OC2M_Pos);
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// Activation du Preload pour le Canal 2 du Timer 3
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TIM3->CCMR1 |= TIM_CCMR1_OC2PE;
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// Activation du Preload pour le Canal 3 du Timer 2
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TIM2->CCMR2 |= TIM_CCMR2_OC3PE;
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TIM2->CCER |= TIM_CCER_CC3E; // Activer la sortie du Canal 3
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TIM2->CCR3 = vitesse; // Vitesse initiale à 0
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TIM2->CR1 |= TIM_CR1_CEN; // Démarrer le Timer 2
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TIM3->CCER |= TIM_CCER_CC2E; // Activer la sortie du Canal 2 (Capture/Compare 2 Enable)
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TIM3->CCR2 = 0; // Vitesse initiale à 0
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TIM3->CR1 |= TIM_CR1_CEN; // Démarrer le Timer 3 (Counter ENable)
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}
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void init_Timer_RoueGauche(char sens, uint8_t vitesse)
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{
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// Activation des horloges
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RCC->AHB1ENR |= (RCC_AHB1ENR_GPIOAEN | RCC_AHB1ENR_GPIOBEN);
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RCC->APB1ENR |= RCC_APB1ENR_TIM3EN;
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RCC->APB2ENR |= RCC_APB2ENR_TIM1EN;
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// Configuration des MODER
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GPIOB->MODER &= ~GPIO_MODER_MODER4;
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GPIOB->MODER |= GPIO_MODER_MODER4_1; // PB4 en AF
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GPIOA->MODER &= ~GPIO_MODER_MODER10;
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GPIOA->MODER |= GPIO_MODER_MODER10_1; // PA10 en AF
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// Configuration des AFR
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// PB4 -> TIM3 CH1 (AF02)
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GPIOB->AFR[0] &= ~GPIO_AFRL_AFSEL4;
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GPIOB->AFR[0] |= (2 << GPIO_AFRL_AFSEL4_Pos);
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// PA10 -> TIM1 CH3 (AF01)
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GPIOA->AFR[1] &= ~GPIO_AFRH_AFSEL10;
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GPIOA->AFR[1] |= (1 << GPIO_AFRH_AFSEL10_Pos);
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// Paramétrage Timers
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TIM3->PSC = 35; TIM3->ARR = 99; TIM3->CR1 |= TIM_CR1_ARPE;
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TIM1->PSC = 35; TIM1->ARR = 99; TIM1->CR1 |= TIM_CR1_ARPE;
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// --- TIM3 CH1 (PB4) ---
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TIM3->CCMR1 &= ~TIM_CCMR1_OC1M;
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TIM3->CCMR1 |= (6 << TIM_CCMR1_OC1M_Pos) | TIM_CCMR1_OC1PE;
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TIM3->CCER |= TIM_CCER_CC1E; // Activer le Canal 1
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// --- TIM1 CH3 (PA10) ---
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TIM1->CCMR2 &= ~TIM_CCMR2_OC3M;
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TIM1->CCMR2 |= (6 << TIM_CCMR2_OC3M_Pos) | TIM_CCMR2_OC3PE;
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TIM1->CCER |= TIM_CCER_CC3E; // Activer le Canal 3
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TIM1->BDTR |= TIM_BDTR_MOE; // OBLIGATOIRE POUR TIM1
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// Initialisation vitesses
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TIM3->CCR1 = 0; // Utilise CCR1 pour canal 1
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TIM1->CCR3 = vitesse; // Utilise CCR3 pour canal 3
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// Démarrage
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TIM3->CR1 |= TIM_CR1_CEN;
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TIM1->CR1 |= TIM_CR1_CEN;
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}
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