ae89a65956
The lpc176x has an errata that could cause updates to PCLKSELx to not take effect. Rework the code to use the default peripheral clock speed (25Mhz or 30Mhz) so that this register does not need to be updated at runtime. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
68 lines
1.5 KiB
C
68 lines
1.5 KiB
C
// Main starting point for LPC176x boards.
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//
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// Copyright (C) 2018-2021 Kevin O'Connor <kevin@koconnor.net>
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//
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// This file may be distributed under the terms of the GNU GPLv3 license.
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#include "autoconf.h" // CONFIG_CLOCK_FREQ
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#include "board/armcm_boot.h" // armcm_main
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#include "internal.h" // enable_pclock
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#include "sched.h" // sched_main
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/****************************************************************
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* watchdog handler
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****************************************************************/
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void
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watchdog_reset(void)
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{
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LPC_WDT->WDFEED = 0xaa;
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LPC_WDT->WDFEED = 0x55;
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}
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DECL_TASK(watchdog_reset);
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void
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watchdog_init(void)
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{
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LPC_WDT->WDTC = 4000000 / 2; // 500ms timeout
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LPC_WDT->WDCLKSEL = 1<<31; // Lock to internal RC
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LPC_WDT->WDMOD = 0x03; // select reset and enable
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watchdog_reset();
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}
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DECL_INIT(watchdog_init);
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/****************************************************************
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* misc functions
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****************************************************************/
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// Check if a peripheral clock has been enabled
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int
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is_enabled_pclock(uint32_t pclk)
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{
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return !!(LPC_SC->PCONP & (1<<pclk));
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}
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// Enable a peripheral clock
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void
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enable_pclock(uint32_t pclk)
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{
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LPC_SC->PCONP |= 1<<pclk;
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}
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// Return the frequency of the given peripheral clock
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uint32_t
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get_pclock_frequency(uint32_t pclk)
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{
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return CONFIG_CLOCK_FREQ / 4;
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}
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// Main entry point - called from armcm_boot.c:ResetHandler()
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void
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armcm_main(void)
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{
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SystemInit();
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sched_main();
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}
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